NANDFlashSim: Intrinsic Latency Variation Aware NAND Flash Memory System Modeling and Simulation at Microarchitecture Level


As NAND flash memory becomes popular in diverse areas ranging from embedded systems to high performance computing, exposing and understanding flash memory's performance, power consumption, and reliability becomes increasingly important. Moreover, with an increasing trend towards multiple-die, multiple-plane architectures and high speed interfaces, high performance NAND flash memory systems are expected to continue to scale. This scaling should further reduce costs and thereby widen proliferation of devices based on the technology. However, when designing NAND flash-based devices, making decisions about the optimal system configuration is non-trivial because NAND flash is sensitive to a large number of parameters, and some parameters exhibit significant latency variations. Such parameters include varying architectures such as multi-die and multi-plane, and a host of factors that affect performance, power consumption, and reliability. Unfortunately, there are no public domain tools for high-fidelity, low-level NAND flash memory simulation in existence to assist with making such decisions.

Therefore, we introduce NANDFlashSim; a latency variation-aware, detailed, and highly configurable NAND flash simulation model. NANDFlashSim implements a detailed timing model for operations in legacy mode, cache mode, multi-plane mode, interleaved-die mode and internal data move mode, which are all compliant with Open NAND Flash Interface (ONFI). In addition, NANDFlashSim models power consumption and reliability of NAND flash memory systems based on statistics. The simulator can be downloaded from∼mqj5086/nfs.